High-level Modeling and Validation of Embedded Systems

Speaker:  Prabhat Mishra – Gainesville, FL, United States
Topic(s):  Graphics and Computer-Aided Design

Abstract

Design validation is a major bottleneck in System-on-Chip (SoC) design – up to 70% of the time (cost) is spent in functional and timing validation. To drastically reduce overall validation effort, verification engineers use an efficient combination of simulation-based techniques and formal methods. In this talk, I will cover various high-level modeling and validation approaches. I will cover both fundamental challenges and existing solutions for validation of functional behavior as well as non-functional requirements. I will describe how a wide variety of learning techniques can be used to improve automated generation of directed tests including scalable test generation approaches by combining static analysis and symbolic execution. I will also describe how test generation techniques are useful for validating non-functional requirements such as peak power, peak temperature and real-time constraints. Finally, I will present some insights into extending these approaches for validation of hybrid systems consisting of both discreet and continuous dynamics.

About this Lecture

Number of Slides:  90
Duration:  60 minutes
Languages Available:  English
Last Updated: 

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