Aida Todri-Sanial received her Ph.D. degree in Electrical and Computer Engineering from the University of California Santa Barbara, USA in 2009 and her Habilitation de Diriger de Recherches (HDR) from the University of Montpellier in 2015. She is currently a Research Scientist at CNRS (French National Center for Scientific Research) and member of the Microelectronics Department at LIRMM since October 2011. Prior to joining CNRS, she was an R&D Engineer at Fermilab, IL, USA. She has also several visiting research position at Cadence Design Systems, CA, USA (2002-2004), Mentor Graphics, CA, USA (2005), IBM TJ Watson Research Center, NY, USA (2006-2007), STMicroelectronics, Grenoble, France (2008). Dr. Todri-Sanial is recipient of several awards, CNRS Medaille de Bronze 2016, CNRS Scientific Excellence Award (PES) 2012, John Bardeen Fellow in Engineering at Fermilab 2009, Best Teaching Assistant at Univ. California Santa Barbara, 2006, etc. She has published over 100 papers in VLSI design area. She served as General Chair for ISVLSI 2015 and participates as Technical Program Committee for IEEE DATE, IEEE ISQED, IEEE NEWCAS, IEEE ISVLSI, IEEE GLSVLSI and IEEE/ACM DAC. She also serves as technical reviewer for IEEE Trans. on Computers, CAD, CAS-I, CAS-II, TNS, and IET. She is an Associate Editor for Transactions on VLSI journal. Dr. Todri-Sanial is also engaged with European agencies such as European Platform of Women Scientist (EPWS) and the European Association for Women in Science, Engineering and Technology (WiTEC). She is a member of IEEE and ACM.
Aida Todri-Sanial is a member of ACM. She has been the Guest Co-Editor for ACM Journal on Emerging Technologies in computing Systems (JETC) for the special issue on "Advances in Design of Ultra-Low Power Circuits and Systems in Emerging Technologies" in 2015. Currently, she is the Guest Co-Editor for ACM JETC for the special issues on "Nanoelectronics Circuits and Systems Design Methods for Mobile Computing Era". Dr.Todri-Sanial is also involved as an organising member for different conferences DATE, GLSVLSI and DAC.
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Physical Design Challenges and Solutions for Three-Dimensional Integrated Circuits
Three-dimensional (3-D) ICs offer dense integration of heterogeneous technologies with a small footprint. Interconnection of the various tiers by means of through-silicon vias...
Toward Carbon Nanotube Interconnects for Nanoelectronics
Carbon nanotubes (CNTs) due their unique electrical, thermal and mechanical properties are being investigated as promising candidate material for on-chip and off-chip interconnects. The attractive...
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