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<li><a href="/">Home</a></li> <li><a href="/lectures">Lectures</a></li> <li class="current">Cache Coherence in Multicore and Multiprocessor Systems</li> </ul> </div> </div> <div class="speakers"> <div class="row lecture__section"> <h1>Cache Coherence in Multicore and Multiprocessor Systems</h1> <span> <strong>Speaker: </strong> <a href="../speakers/solihin_11109">Yan Solihin</a> <span> – Orlando, FL, United States</span> </span><br/> <span> <strong>Topic(s): </strong> <a href="../topics/architecture-embedded-systems-and-electronics-robotics">Architecture, Embedded Systems and Electronics, Robotics</a> </span> </div> <div class="row lecture__section"> <h2>Abstract</h2> In this talk, I will discuss cache coherence problem in multiprocessor and multicore systems, starting from why software needs it, what happens when it is not provided in the system, principles for designing cache coherence protocols, various cache coherence protocols (MSI, MESI, MOESI, etc.), the impact of multiple levels of caches, interaction with cache inclusion property, how it affects and is affected by the interconnection network design, and scalable design for cache coherence. </div> <div class="row lecture__section"> <h2>About this Lecture</h2> <span> <strong>Number of Slides: </strong> 75</span><br/> <span> <strong>Duration: </strong> 90 minutes </span><br/> <span> <strong>Languages Available: </strong> English</span><br/> <span> <strong>Last Updated: </strong> <span id="lecDate"></span> </span> </div> <div class="row lecture__section"> <h2>Request this Lecture</h2> <p>To request this particular lecture, please complete this <a href="https://services.acm.org/public/speakers/request_lecture.cfm?lecture_id=12291" target="_blank">online form.</a> </p> </div> <div class="row lecture__section"> <h2>Request a Tour</h2> <p>To request a tour with this speaker, please complete this <a href="https://services.acm.org/public/speakers/request_tour.cfm?lecturer_id=11109" target="_blank">online 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