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Designing Accelerator-Centric Edge Architectures with Open-Source Platforms

Designing Accelerator-Centric Edge Architectures with Open-Source Platforms

Speaker: David Atienza – Lausanne, Switzerland
Topic(s): Architecture, Embedded Systems and Electronics, Robotics

Abstract

Edge computing is targeting multiple domains nowadays, and a new set of complementary approaches have emerged as main avenues for designing novel accelerator-centric architectures for edge computing. The first approach is based on integrating accelerators in computing systems as part of the micro-architecture comprising validated open hardware components (processors, memories, and peripherals) to derive heterogeneous systems-on-chip. The second is to model the accelerator characteristics inside the edge architecture as a separate module that serves as co-processing system. In this talk, I will cover the pros and cons of these two approaches, focusing on recent works at the Embedded Systems Laboratory (ESL) of EPFL on the X-HEEP open hardware architectural template and the design of the ALPINE computing system for analog in-memory Acceleration with tight processor Integration. I will present these two systems, and describe how we employed these frameworks at ESL-EPFL with our industrial partners to explore emerging computation (e.g., analog vs. Digital in-memory computing) and communication (e.g., in-package wireless) paradigms to explore energy vs. performance vs. temperature control benefits in complex MPSoC architectures.

About this Lecture

Number of Slides: 38
Duration: 50 minutes
Languages Available: English
Last Updated:

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