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Obfuscation of analog IPs

Obfuscation of analog IPs

Speaker: Swaroop Ghosh – State College, PA, United States
Topic(s): Security and Privacy

Abstract

Analog Integrated Circuits (ICs) are one of the top targets for counterfeiting. However, the security of analog Intellectual Property (IP) is not well investigated as its digital counterpart. Although analog design is sensitive to any modification presenting challenges to incorporate security features, it also provides opportunities such as, presence of enumerable performance parameters. The first part of this talk will review various circuit level techniques to obfuscate the performance parameters of analog IP and describe their pros/cons. Next, the possibility of multi-threshold voltage (VTH) to protect the analog IP from Reverse Engineering (RE)-based attacks will be explored. Analog circuits are sensitive to VTH as the operating region of a transistor can vary with VTH. Furthermore, the VTH of individual transistors cannot be identified during the RE process. The trial-and-error based technique to guess the VTH and validate with a golden IC will ramp up RE effort exponentially. Thus, by carefully including multi-VTH transistors, the designer can ensure that the properties of analog IP e.g., gain, bandwidth, and linearity are protected even though the physical dimensions of the transistors are revealed. The talk will demonstrate this technique by using a case study on a wide-swing cascode amplifier. Techniques such as, transistor splitting will be discussed to increase the RE effort further.

About this Lecture

Number of Slides: 45
Duration: 45 minutes
Languages Available: English
Last Updated:

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