Swaroop Ghosh received the B.E. (Hons.) from IIT, Roorkee, India, the M.S. degree from the University of Cincinnati, Cincinnati, and the Ph.D. degree from Purdue University, West Lafayette. He is an assistant Professor at Penn State University. Earlier, he was with the faculty of University of South Florida. Prior to that, he was a Senior Research and Development Engineer in Advanced Design, Intel Corp. At Intel, his research was focused on low power and robust embedded memory design in scaled technologies. His research interests include low-power circuits, hardware security, quantum computing and digital testing for nanometer technologies.
Dr. Ghosh served as Associate Editor of the IEEE Transactions On Computer-Aided Design (2019-) and IEEE Transactions On Circuits and Systems I (2014-2015) and as Senior Editorial Board member of IEEE Journal of Emerging Topics on Circuits and Systems (JETCAS) (2016-2018). He served as Guest Editor of the IEEE JETCAS (2015-2016) and IEEE Transactions On VLSI Systems (2018-2019). He has also served in the technical program committees of ACM/IEEE conferences such as, DAC, ICCAD, CICC, DATE, ISLPED, GLSVLSI, Nanoarch and ISQED. He served as Program Chair of ISQED (2019) and DAC Ph.D. Forum (2016) and track (co)-Chair of CICC (2017-2019), ISLPED (2017-2018) and ISQED (2016-2017).
Dr. Ghosh is a recipient of Intel Technology and Manufacturing Group Excellence Award in 2009, Intel Divisional Award in 2011, Intel Departmental Awards in 2011 and 2012, USF Outstanding Research Achievement Award in 2015, College of Engineering Outstanding Research Achievement Award in 2015, DARPA Young Faculty Award (YFA) in 2015, ACM SIGDA Outstanding New Faculty Award in 2016, YFA Director’s Fellowship in 2017, Monkowsky Career Development Award in 2018, Lutron Spira Teaching Excellence Award in 2018 and Dean's Certificate of Excellence in 2019. He is a Senior member of the IEEE and the National Academy of Inventors (NAI), and, Associate member of Sigma Xi.
• Program Chair, ACM DAC PhD Forum, 2016
• Organization Committee Member, ACM DAC PhD Forum, 2015, 2017
• Track co-Chair, ACM ISLPED, 2017-2019
• Track co-Chair, ACM GLSVLSI, 2018-2019
• Technical Program Committee Member, ACM ICCAD, 2016–2017
• Technical Program Committee Member, ACM ISLPED, 2012-Present
• Technical Program Committee Member, ACM DAC, 2015-2016, 2018
• ACM SIGDA Outstanding New Faculty Award, 2016
• ACM member since 2016
• ACM SIGDA member since 2018
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Comprehensive treatment of security of persistent memories
Conventional volatile memories e.g., Static RAM (SRAM) suffer from significant leakage power whereas conventional storage class Non-Volatile Memories (NVMs) e.g., Flash suffer from higher...
- Demystifying Sensing Techniques for Non-Volatile MemoriesResearch, development and commercialization of emerging Non-Volatile Memories (NVMs) are being aggressively pursued by the design community to supplement and/or substitute the conventional...
- Exploiting Emerging Memory Technologies for Hardware SecurityCMOS switches, although universal, fail to meet energy-efficiency, scalability and emerging constraints such as, security. Recent experimental studies have revealed that emerging...
- Making Noisy Intermediate Scale Quantum (NISQ) Computing UsefulThe concerted effort by industry/academia has produced commercial quantum computers and algorithms that offer speed-up over classical counterparts (at least in principle). The basic...
- Obfuscation of analog IPsAnalog Integrated Circuits (ICs) are one of the top targets for counterfeiting. However, the security of analog Intellectual Property (IP) is not well investigated as its digital counterpart....
- Test Challenges and Solutions for Resilient Non-Volatile Memory DesignAt the end of Silicon roadmap, several emerging non-volatile memory (NVM) technologies have surfaced. Due to plentitude of features such as, non-volatility, capability to create new...
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- Demystifying Sensing Techniques for Non-Volatile Memories