Compression in the memory hierarchy
Speaker: Per Stenstrom – Gothenburg, SwedenTopic(s): Hardware, Power and Energy , Architecture, Embedded Systems and Electronics, Robotics
Abstract
The compute landscape is moving towards being data centric rather than compute centric as in the past. It is well known that cache and memory capacity has a significant impact on performance, energy consumption and cost in today's computers ranging from smartphones, laptops/desktops to server systems in data centers.
One promising approach to improve the uilization of a given amount of cache or main memory is to compress the data contained in it. However, to deal with a compressed cache or memory design involves several challenges including how to access compressed data in cache or memory fast by tackling the issues of choosing a compression algorithm and how to locate, compress and recompress data. This talk offers an overview of state-of-the-art techniques for cache and memory compression and goes into detail in some of the recent ongoing advances in this area.
About this Lecture
Number of Slides: 25Duration: 45 minutes
Languages Available: English
Last Updated:
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