What Programmers Should Know about DRAM
Speaker: Erik Brunvand – UT, United StatesTopic(s): Applied Computing
Abstract
Dynamic Random Access Memory (DRAM) is what makes up the "main memory" of most computer hardware. It's also much stranger than you might think, and has hidden complexity that can have a large influence on how your programs run. In this talk we describe the behavior of the DRAM chips that make up main memory, and what programmers should know about DRAM when designing for good latency and power behavior. For applications where data are often not cache-resident (e.g. graphics, scientific computation, data analytics, etc.), optimizing for DRAM access is critical for improving both speed and power performance.
The dramatic difference in speed and power of a DRAM access vs. an on-chip cache memory access means that even small changes in main-memory traffic and behavior can have a large impact on system performance. For example, many studies attribute 25-40% of total power consumed in a datacenter to the DRAM system. In the graphics domain, a proposed architecture for ray tracing with cache hit rate percentages in the 90% range still shows almost 60% of the power consumed in the DRAM. However, optimizing for main memory requires knowing something about the complex and subtle behavior of DRAM memory. This includes understanding chip organization and functionality, organization of chips and data on a dual inline memory module (DIMM), and the behavior of the memory controller.
In this talk we describe in high-level terms how DRAM memory works, motivate with some examples of how much difference DRAM optimization can make in graphics programs, and describe a detailed DRAM simulator (USIMM) that can be used to add high-fidelity DRAM models to system simulations. We conclude with some thoughts on how programmers can take advantage of this knowledge to optimize their applications for main memory performance.
About this Lecture
Number of Slides: 55 - 85Duration: 60 or 90 minutes
Languages Available: English
Last Updated:
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